Design of a beam‐steering test bench based on OpenVPX architecture

Due to a large number of beam-steering units and complex interfaces of a spaceborne phased-array radar, the fault location in joint tests is difficult, the troubleshooting efficiency is low, and the progress of the project is difficult to guarantee. To solve the above problems, this study presents a design scheme of full-array beam-steering test bench based on OpenVPX architecture. This solution utilises OpenVPX architecture's advantages of good versatility, strong scalability, high transmission bandwidth, and rich I/O ports. It adopts commercial off-the-shelf modules that conform to the OpenVPX standard to build the hardware system. The serial rapid I/O switching technology is used to implement high-speed interconnections and full-function automated testing from the primary beam-steering unit to the secondary beam-steering units. Compared with the existing test methods, this test bench meets the development trend of commercialisation, interchangeability, interoperability and adoption of open industry standards for user testing requirements, which greatly improves the efficiency of full-array beam-steering testing and reducing labour intensity. The average test period is reduced from more than one week to less than one day, achieving the design requirements for rapid test and accurate fault location.


Introduction
In the phased array radar, the beam-steering system is responsible for transmitting the received beam control code and timing control signal to the active microwave modules, and collecting the fault information, check errors, and other data sent to the superior controller [1]. With the increasingly complex functions and performance of large-scale phased array radars, the beam-steering system has gradually evolved from the initial single device to multi-level devices, and the number of beam-steering devices has also multiplied. If a beam-steering device malfunctions due to operational errors, loose cable installations and so on, it is necessary to check each device one by one. The positioning of the fault usually requires a lot of manpower and material resources. The development of a test bench supporting full-array test of the beam-steering system has become an inevitable requirement. The external interface of this test bench needs to have good extensibility to meet the test of beam-steering systems with different sizes. At the same time, the data transmission bandwidth should be high enough to shorten the multi-function test period and fault location time.
In the existing test system, the authors of [2][3][4] show the implementation based on the compact peripheral component interconnect (CPCI) bus, but since the CPCI bus has a maximum data transmission bandwidth of only 132 MB/s, a maximum of eight interface boards can be expanded to connect to external I/Os. Only 1725 pairs of I/O ports, low scalability resources and low data bandwidth make the CPCI bus only suitable for functional testing of stand-alone devices and cannot meet the testing requirements for a beam-steering system of large-scale phased array radar [5]. The authors of [6][7][8] proposed a test system of phased array radar equipment based on PXI bus. Because PCI eXtentions for instrumentation (PXI) bus is an extension of CPCI bus in instrumentation field, it still has the disadvantages of CPCI bus expansion capability and insufficient data bandwidth, so it is also cannot meet the testing requirements for a beam-steering system of large-scale phased array radar.
This paper uses a beam-steering system of large-scale phased array radar as the test object and builds a hardware test bench based on the OpenVPX architecture with abundant I/O ports, strong scalability, and high transmission rate. It adopts high-speed interconnection technology based on serial rapid I/O (SRIO) switching. Based on the OpenVPX architecture, the design scheme of the beam-steering system test bench is presented.

OpenVPX architecture
The OpenVPX architecture (VITA65) is a next-generation systemlevel bus standard developed by VITA based on the VPX standard (VITA46). The VPX standard mainly stipulates the technical specifications of the board, belongs to a board level or module standard, and does not give a unified definition to the system framework composed of multiple boards. For example, the VITA46 specification only specifies P1 differential signals, and P2, P3, P4, P5, and P6 can both take differential signals and single-ended signals [9,10]. This gives the user or designer great freedom, but also leads to the incompatibility of the interfaces of the various products. The OpenVPX architecture is a system standard based on VPX. Based on the VPX specification, it defines the framework requirements for compatibility between different systems. Compared with the previous standard, OpenVPX proposes and improves the following system design concepts: • Introduce VXS bus high-speed exchange idea, set up special SRIO exchange management module, thus realise arbitrary communication between any module. • Introduce the concept of chassis management, manage and maintain the field replaceable units and common chassis devices through the system management bus to achieve system-wide clock synchronisation, remote power control, and reset operations. • Introduce Ethernet to backplane design theory to implement Ethernet switching between modules.
To ensure the versatility, interchangeability, and extensibility of the modules and to change the inconsistent specifications of the previous VPX bus boards, the OpenVPX architecture proposes a variety of solutions for backplanes. According to [11], OpenVPX backplane architecture is available in a variety of topologies such as single star and double stars. Fig. 1  switching interconnects, with the maximum effective data bandwidth of 80 Gbps, and two Ethernet switching interconnects global clocks, and system-level debugging are supported. Compared with the existing CPCI and VME bus standards, the OpenVPX architecture enhances module power and cooling support, significantly improves communication bandwidth, and is more suitable for digital, software, and universal beam-steering test benches [12].

Test bench design
The structure of a test bench for a spaceborne phased array radar beam-steering system is shown in Fig. 2. The beam-steering system consists of one primary beam-steering unit and thirty secondary beam-steering units. The primary beam-steering unit communicates with the secondary beam-steering units through ten LVDS buses, and each bus has three secondary beam-steering units. Each secondary beam-steering unit controls 16 four-channel T/R modules through four RS422 buses. Each RS422 bus controls four T/R modules through ten pairs of differential lines (i.e. nine pairs of differential control lines and one pair of differential telemetry signal lines), and a total of 1200 pairs of differential signals are connected between the test bench and the secondary beam-steering system. In this design, the test bench of the beam-steering system is mainly composed of a power module, a computer module, a data exchange module, seven universal interface boards, and a highspeed VPX backplane that conform to the Open-VPX standard of 6 U modules. The seven universal interface boards are connected to the secondary beam-steering units through the corresponding backward plug-in board. The computer module is connected to the primary beam-steering unit through the optical fibre. According to the peer-to-peer exchange principle, the data exchange module slot is located in the middle of the seven universal interface slots.
The power module uses an AC 220 V/50 Hz input and is internally converted to +12 V main power, +5 V main power, and +3.3 V auxiliary power to supply power to the remaining nine modules. The rated current of +12 V is 42 A with ripple <240 mV. The rated current of +5 V is 60 A with ripple <100 mV. The rated current of +3.3 V is 10 A with ripple <99 mV. Also, one +12 V auxiliary power supply can also be provided to the fan for cooling the modules in the test bench. The total output power is 957 W.
The data exchange module uses the Freescale PPC processor MPC8548E, supports eight channels of 4×SRIO and eight channels of 4 × PCIe, and is used for data exchange between the seven universal interface boards SRIO and the computer module SRIO. The data exchange module communicates with each universal interface board through 1 × SRIO and the transmission bandwidth is 2.5 Gbps. Because the data transmission between the data exchange module and the computer module is relatively concentrated, the data exchange module communicates with the computer module via 4×SRIO to avoid waiting to ensure real-time transmission, and the transmission bandwidth is 10 Gbps [13].
The computer module uses a fourth-generation Intel Core processor with onboard 16 GB memory, provides 1 or 2 PMC/XMC modules, supports operating systems such as Windows, Linux, and VxWorks, and installs special test software for beam-steering systems. On the one hand, the computer module sends the control code and control timing to the primary beamsteering unit according to the beam parameter setting, and then automatically compares and judges the received control code and the control time sequence from the secondary beam-steering units. On the other hand, it generates BIT test data like T/R modules, simulate control codes and timing failure, and automatically perform telemetry comparisons and judgments. The computer module is connected to the primary beam-steering unit through the optical fibre, and the maximum transmission rate is 6.25 Gbps.
The universal interface board is based on the Virtex-5 series FPGA controller XQ5VX100T. It has 8208Kb RAM blocks, 16 RocketIO transceivers, and 20 I/O Banks. The rich 36Kb dual-port RAM block resources can be programmed from 32K × 1 to 512 × 72. It brings great convenience for data buffering and asynchronous read and write design. RocketIO transceivers are capable of operating from 100 Mbps to 3.75 Gbps, supporting full clock and data recovery. Each interface board establishes a communication link with the data exchange module through the 1 × SRIO and the external interface passes through the backward plug-in board. It connects to the secondary beam-steering units by four J30J-51TJW connectors, and all the control signals and telemetry signals conform to the RS422 differential standard [14].
Except for a pair of SRIO signals communicated with the data exchange module, each universal interface board can actually provide 190 pairs of differential pair signals. Then seven universal interface boards can externally provide 1330 pairs of differential signals to satisfy the design requirements of 1200 differential signals.

Testing process
The beam-steering system test bench completes the remote control and telemetry function testing through the self-closing test and automatically locates fault points through the comparison of sending data and receiving data, thereby improving troubleshooting efficiency. The following two tests are elaborated in detail.

Process of remote control test
The main purpose of the remote control test is to verify the correctness of the transmission code and control timing. It starts with large data frames sent to the primary beam-steering unit by a computer module through the optical fibre interface. The big data frame is composed of frame header, control code, transmitting trigger pulse width, receive trigger pulse width, refresh pulse distance from the leading position and check digits. The specific test process is described as follows: • The power module is powered on firstly, and the test type is set in the beam-steering special software. The computer module sends the big data frame to the primary beam-steering unit through the optical fibre interface at a transmission rate of 3.125 Gbps. • The primary beam-steering unit receives the large data frame and verifies the correctness. If there is no error, it is divided into 10 small data frames. The small data frame is sent to 30 secondary beam-steering units through 10 LVDS buses simultaneously at a transmission rate of 100 Mbps. If there is an error, the big data frame is discarded and the error flag is recorded. • After receiving the small data frame, the secondary beamsteering unit verifies the correctness. At the same time, it judges the transmitting trigger pulse width, the receive trigger pulse width and the refresh pulse distance from the leading position. If there is no error, the beam-steering code is sub-packaged into 16 small segments. The working sequence is divided into four channels, which are simultaneously sent to seven universal interface boards via RS422 bus at a transmission rate of 5 Mbps. If the check error occurs, the big data frame is discarded. If the transmitting trigger pulse width is too wide, the security width is forcibly converted and the error is recorded. • The universal interface boards simulate 16T/R components to receive beam-steering code and control sequences, which are then sent to the data exchange module through the 1 × SRIO channels, respectively, and uploaded to the computer module by the data exchange module. • The computer module compares the received beam-steering code with the transmitted code, compares the received control timing with the sending time sequence, and the comparison result is visually displayed on the test software, thereby completing the full-array remote control test and fault location.

Process of telemetry test
The main purpose of telemetry is to observe whether there is an abnormality in the full array of the beam-steering system. Telemetry tests include error simulation tests and BIT management. The error simulation test is to detect and control the error information of the wave control system. Usually, the simulated errors include data verification errors and excessive launch trigger pulse errors. BIT management is to detect the ability of the beam-steering system to detect its own fault status and the fault status of the subordinate T/R components. The specific test procedure for telemetry testing is described as follows: • Select the wrong instruction type in the beam-steering special test software. The big data frame containing the error information generated by the computer module is sent to the primary beam-steering unit through the optical fibre interface. • The primary beam-steering unit receives the large data frame and verifies the correctness. If there is no error, it is packetised into 10 small data frames which are sent to 30 secondary beamsteering units through the 10 LVDS buses. If there is an error, the large data frame is discarded, and the error flag is recorded. • The secondary beam-steering unit receives the small data frame and verifies the correctness. If the check error occurs, the big data frame is discarded. It also judges the transmitting trigger pulse width, if it is too wide, the security width is forcibly converted and the error is recorded. • The computer module simulates the failure of all or part of the T/R components by sending a large packet containing 480 bits to the data exchange module via the 4× SRIO channel. The data exchange module divides the received large packet into seven small data segments which are sent to each universal interface board through 1× SRIO channel, respectively. The universal interface board sends the failure bits to the secondary beamsteering unit through the backward plug-in board. The secondary beam-steering unit receives and saves the corresponding BIT information internally. • Send telemetry instructions through beam-steering special test software, which are forwarded by the computer module to the primary beam-steering unit through the fibre interface.
• The primary beam-steering unit receives the telemetry command and sends the read data timing to the 30 beam-steering units through the 10 LVDS buses. The read timing starts with the falling edge of the READ signal and is always maintained low during data reading. It ends with the READ rising edge. According to the read data timing, The 30 beam-steering units make data check error, transmitting trigger pulse width error, T/R component failure, and other BIT status information together sent back to the primary beam-steering unit. • The primary beam-steering unit packages all the BIT data together with its own error information and sends them to the computer module through the optical fibre interface for judgment and display. The judgment result is automatically archived to complete the telemetry test [15].

Test analysis
The beam-steering system in this paper consists of one primary beam-steering unit, 30 secondary beam-steering units, 480T/R modules, and several interconnected cables. Each T/R module includes four transceiver channels, and the length of the control code for each channel is 28 bits.

Remote control test
The test bench sends the control code to the primary beam-steering unit like a beam controller, and receives the feedback code from the secondary beam-steering units like the T/R modules. The received code is displayed in the data table of TR1-TR16, and compared with the transmitted code according to the T/R channels one by one. If the comparison result is consistent, it indicates that the beam-steering system is working properly; or else there are faults to be ruled out in a beam-steering unit. Table 1 shows the results of the remote control test for a secondary beam-steering unit and its eight components. The letter Y indicates the comparison result is equal.

Telemetry test
Each secondary beam-steering unit has a 10-channel 8-bit A/D converter inside. The thermistor monitors module temperature on antenna array and sends inductive signal to the A/D converter. The telemetry data of the temperature is 8-bit binary format, and the test bench converts the binary data into decimal data through the following formula: where D is the binary data collected, and Y is the decimal data that needs to be displayed. For example, if the binary data is 00111000, the displayed temperature value is 53°C. The collected temperature between −40 and 80°C is considered normal. Each secondary beam-steering unit connects 16T/R modules and each T/R module feeds back 1-bit binary fault data. 0 indicates that the module is faulty and 1 indicates that the component is normal. The normal width of the firing trigger pulse is 100 μs, beyond which the pulse width error flag will be set.
An error bit is set in the small data frame parity bit sent to the secondary beam-steering units. When the secondary beam-steering unit receives the small data frame and performs the sum check, the check error flag will be set if the check result is inconsistent with the check bit. The received fault information and error flags are compared with the preset values, and the telemetry function is considered normal if the compared result is consistent. Table 2 shows the results of the telemetry test for a secondary beamsteering unit and its 16 components. Also there are two thermistors connected to the secondary beam-steering unit. The letter Y also indicates the comparison result is equal.

Advanced analysis
According to the statistical results, the average debugging time of the primary beam-steering unit is 0.6 h, with each secondary beam-J. Eng steering unit 0.3 h, and T/R component 0.2 h. The total time of the beam-steering system debugging is 105.6 h. Due to the high reliability of the cable, the interconnection cable fault is ignored here. By the daily debugging of 12 h, it takes about 9 days to complete all the troubleshooting of the beam-steering system. In the test bench of this design, the remote and telemetry test are automatically completed by the computer module, and the failure information and the exact position can be automatically displayed, so the time of fault location can be ignored. After the fault location is determined, the troubleshooting time depends on the debugging time of the single machine. The type and quantity of the single machine that has failed are different, and the time required for troubleshooting is also different. According to the practical experience of the beam-steering test bench, the test period of the full-array beam-steering system can be shortened to one day.

Conclusion
This paper addresses the performance requirements for generalpurpose, scalable, high-bandwidth, full-function testing of beamsteering systems. Combined with the most advanced OpenVPX bus technology in the world, a design scheme of beam-steering test bench is presented. The test bench has significant advantages in terms of versatility, scalability, transmission bandwidth and so on. It can not only meet the test requirements for input and output signals of beam-steering systems with different scales, but also greatly improve the test efficiency and shorten the system test period, saving a lot of human resources. It is ideal for automated testing of radar beam-steering systems now and in the future.   TR1  CH1  1C00B12  1C00B12  Y  CH2  000ACD0  000ACD0  Y  CH3  812053C  812053C  Y  CH4  4211001  4211001  Y  TR2  CH1  1C00B12  1C00B12  Y  CH2  000ACD0  000ACD0  Y  CH3  812053C  812053C  Y  CH4  4211001  4211001  Y  TR3  CH1  1C00B12  1C00B12  Y  CH2  000ACD0  000ACD0  Y  CH3  812053C  812053C  Y  CH4  4211001  4211001  Y  TR4  CH1  1C00B12  1C00B12  Y  CH2 000ACD0