Metal organic chemical vapour deposition regrown large area GaN‐on‐GaN current aperture vertical electron transistors with high current capability

large area GaN-on-GaN current aperture vertical electron transistors with high current capability Philipp Doering,1,✉ Rachid Driad,2 Richard Reiner,2 Patrick Waltereit,2 Michael Mikulla,2 and Oliver Ambacher1,2 1Department of Power Electronics, Albert-Ludwigs University, Freiburg 79108, Germany 2Fraunhofer Institute for Applied Solid State Physics IAF, Freiburg 79108, Germany ✉E-mail: philipp.doering@inatech.uni-freiburg.de

✉ E-mail: philipp.doering@inatech.uni-freiburg.de In this work, a large area current aperture vertical electron transistor (CAVET) is fabricated on bulk GaN substrates grown by metal organic chemical vapour deposition (MOCVD). The current blocking layer (CBL) is formed by low dose Mg-implantation to allow for MOCVD regrowth under standard growth conditions, which simultaneously serves as an in-situ annealing process. Small transistors are evaluated regarding gate-aperture overlap (L GAP ) to derive a robust layout in order to suppress source-drain leakage. Optimized gate-aperture dimensions are adopted and combined with a common comb structure design and the established gate-source module of the lateral HEMT to demonstrate a large area CAVET comb structure. The multi-finger device exhibits an on-state resistance of R ON = 2.15 Ω and a chip area of A = 2 × 2 mm 2 . The large area CAVET reveals a maximum drain current of I D,MAX = 20.1 A at a drain-source voltage of V DS = 45 V, corresponding to a power of P = 900 W.
Introduction: The current aperture vertical electron transistor (CAVET) is a promising candidate for vertical GaN-devices, as it combines the established gate-source module of a lateral high electron mobility transistor (HEMT) and the two-dimensional electron gas (2DEG) at the Al-GaN/GaN interface with the benefits of a vertical depletion-and driftregion. Additionally, the peak electric field is buried in the bulk material, which was shown to avoid surface related dispersion [1,2]. As a result, most of the surface-related fabrication processes of the lateral HEMT are adoptable for CAVETs, without the need of a complex field-plate design. A major challenge in the fabrication of CAVET structures has been the diffusion of Mg from the current blocking layer (CBL), which serves as a potential barrier between source and drain, during the overgrowth of the GaN-channel and the AlGaN-barrier. This has mostly been addressed by molecular beam epitaxy (MBE) regrowth of the GaN-channel, as the lower growth temperature with respect to MOCVD allows for much sharper doping profiles. Small gate width transistors were published in CAVET technology using Mg-implantation [1] or selective area regrowth [2] of the CBL, Si-implantation of the aperture region [3] or by overgrowth of an etched aperture [4]. Mg-implantation to form the CBL seems to be an advantageous process, as the aperture region remains unaffected and only one (planar) regrowth step is necessary to fabricate the CAVET structure. Moreover, the breakdown voltage has been an issue in CAVET structures fabricated by SAG, aperture implantation or nonplanar regrowth [2][3][4]. However, CAVETs using Mg-implantation were only demonstrated by separate post-annealing of the Mg-implanted CBL and subsequent MBE regrowth yet [1]. In addition, although promising results were presented by all mentioned fabrication strategies, the fabricated transistors were limited to maximum drain currents in the mArange [1][2][3][4]. However, the operation on large-area devices with current in the A-range have to be demonstrated to prove the suitability of CAVET for power applications.
This work presents fabrication and measurement results on large-area CAVET devices with high current handling capability, completely grown by using only metalorganic chemical vapour deposition (MOCVD). The CBL was formed by Mg-implantation with a low implantation dose to limit diffusion into the overgrown GaN-channel. This approach was shown to be useful in CAVET structures at standard MOCVD growth temperatures [5] as the 2DEG remains unaffected. In addition to that, the elevated temperatures of the MOCVD overgrowth also served as an in-situ annealing process of the implanted CBL, which allows for a simplified fabrication process. Small gate width CAVETs were fabricated to establish a robust device design with respect to the gateaperture overlap to ensure gate control in the regrown GaN-channel and to suppress substantial source-drain leakage. Optimized gate-aperture dimensions of the vertical layout are combined with the standard comb structure design and an established gate-source module of the lateral HEMT [6]. As a result, a large area CAVET comb structure is demonstrated with a chip size of 2 × 2 mm 2 . A maximum drain current of I D,MAX = 20 A is shown in pulsed measurements with a differential on-state resistance of R ON = 2.15 Ω. The breakdown in this device was measured at V BD = 122 V. The maximum drain current is measured at a drain-source voltage of V DS = 45 V, which accords with a pulse power (t PLS = 0.5 ms) of P = 900 W. The achieved high current handling capability demonstrates the potential of the CAVET technology, in combination with the comb structure design and an industrial MOCVD process for the use in high current/power applications.
Experimental section: The fabrication of the CAVET structure started with the MOCVD growth of a 2 μm uid-GaN drift layer (nominally N D = 5 × 10 16 cm −3 ) on a 2 inch bulk GaN substrate having a thickness of 380 μm. A current blocking layer was formed by Mg-ion implantation at an energy of 100 keV and a dose of 2 × 10 14 cm −2 (Figure 1a), which is one order of magnitude lower than the dose used in [1], resulting in a peak Mg-concentration of 1 × 10 19 cm −3 . A 3 μm thick photoresist served as a protection for the aperture region during implantation.
After the photoresist was removed, the CAVET structure was finalized by a planar Al 0.25 Ga 0.75 N/GaN-regrowth with a 25 nm thin barrier and a 250 nm uid-GaN channel (Figure 1b), to separate the 2DEG from the CBL. The regrowth temperature of about 1050°C also served as an in-situ annealing of the Mg-implanted CBL without the requirement of a capping layer. The morphology of the final CAVET structure was measured after regrowth by atomic force microscopy (AFM) and revealed a root mean square of RMS = 0.18 nm in a 10 × 10 μm 2 scan.
The device fabrication is based on standard III-V processing technology. A Ti/Al/Ni/Au metal stack is deposited and alloyed at around 825°C to form the ohmic source contacts. The devices are then passivated with a SiN X dielectric layer deposited by plasma enhanced chemical vapour deposition (PECVD) and subsequently isolated by Arimplantation. Afterwards, inductively coupled plasma reactive ion etching (ICP-RIE) is used for gate-via opening. Schottky gate contacts are fabricated with an Ni-Au-based metal stack. The surface process is finished by an additional SiN X dielectric layer and a TiPtAu-based interconnection metallization stack. Finally, the drain contact is realized at the backside of the bulk GaN substrate (Figure 1c) with the same aforementioned ohmic metal stack.
Results and discussion: A critical parameter in the design of the CAVET is the gate aperture overlap L GAP [1] shown in Figure 1d. L GAP determines the gate control in the device by suppressing source-drain leakage  through the GaN-channel. The required overlap needs to be adjusted with respect to the channel thickness between the CBL and source contact in the fabricated device structure. In order to derive an optimum dimension of the gate-aperture overlap, small gate width CAVETs were fabricated with L GAP ranging between 0 and 2 μm and a gate width of W G = 100 μm. As the product of the aperture length and the doping concentration in the aperture determines the impact of the aperture resistivity on the total device resistance [2], either substantial doping or high aperture length are required. Since high doping of the aperture region goes along with a decrease in electric field strength, a low doping concentration was used in this approach. Thus, to minimize current choking in the unintentionally doped aperture region an aperture length of L AP = 10 μm was used in all devices, which was verified by TCAD simulations to have a negligible effect for donor concentrations above N D = 1 × 10 16 cm −3 . Figure 2 exhibits the transfer characteristics of the small CAVETs at a drain-source voltage of V DS = 10 V. The CAVET with a gate-aperture overlap of L GAP = 2 μm reveals a threshold voltage of V TH = −2.8 V with a low leakage current of 4.5 × 10 −7 kA/cm 2 in the off-state. The device presented an I ON /I OFF ratio of 10 5 with a sub-threshold slope S S-TH around 90 mV/dec. Breakdown was measured to be at 282 V at room temperature, corresponding to a critical electric field of E C = 1.25 MV/cm (assuming depletion over the complete gate to drain distance). Similar results were obtained for test structures without an aperture, indicating that the breakdown is related to the current blocking layer. It is also worth noting that, the calculated field strength is higher than published values in [1] (0.86 MV/cm, 3 μm drift layer), which demonstrates the suitability of the low dose implantation and the in-situ annealing process during MOCVD overgrowth. A decrease in L GAP to 1 μm leads to a significant increase in the sub-threshold swing to around 420 mV/dec, while the leakage current increased slightly by half an order of magnitude. Without any gate overlap (L GAP = 0), the transistor did not turn off, and substantial source-drain leakage could not be suppressed even at high negative V GS , which is in agreement with the expected loss in gate control.
With the optimized dimensions of the gate-aperture overlap, a multi-finger transistor with an aperture length of L AP = 10 μm, an aperture-gate overlap of L GAP = 2 μm, an aperture width of W = 58 × 1.32 = 77 mm (number × width) and an active finger area of 1.85 mm × 1.32 mm was subsequently fabricated and characterized. The total chip, including gate and source pad, has an area of 2 × 2 mm 2 . The transfer characteristics of the large device is shown in Figure 3a. I was measured in on-wafer measurements up to a constant current of 1 A (high power source measurement unit, Keysight-B1505A). As the current compliance is exceeded in the on-state above V GS = −2 V, the transfer characteristics are only shown up to V GS = −1.8 V. The CAVET exhibits a threshold voltage of V TH = −2.8 V similar to the small gate CAVET. However, the sub-threshold slope increased for the large device to around S S TH = 140 mV/dec, when compared to the small CAVET test structures, indicating less gate control in the GaN-channel in the large device. In addition, the large area device reveals an off-state current in the range of 5 × 10 −5 kA/cm 2 , which is two orders of magnitude higher, when compared to the small CAVETs.
Breakdown was measured to be at 122 V at room temperature, as shown in Figure 3b. It is assumed that the reduction in voltage robustness and the increase in leakage current and sub-threshold slope is attributed to the reduction in yield over the large device. The pulsed output characteristics (pulse width = 500 μs) of the fabricated comb structure are shown in Figure 4 for V GS from −5 to +3 V. A maximum drain current of 20.1 A was measured at V GS = 3 V and V DS = 45 V. The corresponding pulse power of P = 900 W at a pulse width of 0.5 ms demonstrates the robustness of the device.
The CAVET exhibited a total differential on-state resistance of R ON = 2.15 Ω. The measured absolute current of the vertical comb structures is comparable to published values for lateral HEMT structures with the same layout [6]. However, the device reveals a turn-on voltage of around 3 V. Such effect has previously been observed in earlier publications [1,4]. A partial depletion in the aperture due to the lateral pnjunction (CBL-aperture) has been assumed in [4] but the exact mechanism underlying this effect is still under investigation. The high on-state resistance and the high saturation voltage V D,SAT in the fabricated devices are assumed to be a result of low effective carrier concentration in the nominally undoped aperture and drift region. Hall measurements of the AlGaN/GaN heterostructure revealed a sheet carrier concentration of n S = 8 × 10 12 cm 2 and a carrier mobility of μ = 1380 cm 2 V s −1 . Thus, a high compensation of the 2DEG by Mg-diffusion can be ruled out. Similar on-state resistances can be reproduced in TCAD simulations, when the donor concentration in the aperture and drift region are reduced below N D < 1 × 10 16 cm −3 , which further supports the assumption of donor compensation. Aperture and drift region compensation might be caused by carbon but a partial depletion of the aperture region, due to the mentioned lateral pn-junction cannot be ruled out to cause additional series resistance.
In Table 1, we compare the achieved characteristics to the relatively limited data on CAVETs, regarding active area, current density, absolute current and breakdown voltage. It can be clearly seen that, in contrast to our investigation, most of the studies reported only small CAVET devices, which resulted in limited absolute drain currents.
Additionally, the breakdown voltage in the published devices has been a critical issue, due to very high leakage currents [2][3][4], which was successfully addressed in this work. However, the results of our large CAVETs indicate a reduction in current density J, when compared to results of small CAVETs published in [1,2,4]. Thus, we believe that further optimization in AlGaN barrier layout, n-type doping concentration of the aperture region and process technology will push its performance beyond its lateral counterpart. Moreover, increasing the drift layer thickness in the CAVET structure will be essential for higher voltage sustainability and thus power handling capability to reveal the full potential of this device design.
Conclusion: In this work, a CAVET is presented using Mg-implantation and MOCVD growth, without the need of post annealing and MBE regrowth. A large area CAVET comb structure is achieved by combining the proven gate-source module of an HEMT structure with the vertical transistor design. The device exhibited a maximum drain current of 20.1 A, and a total on-state resistance R ON = 2.15 Ω. The presented high power density structure demonstrates the potential of this CAVET design for high current applications.